ISIS Neutron and Muon Source Data Journal

Upsets induced by neutrons in next-generation Flash Memories

Abstract: Flash memories are the electronic component in which the feature size is scaled more rapidly and which have the largest capacity among semiconductor devices. Recently, another solution besides scaling has been pursued to increase density, i.e. vertical integration, with cells stacked in a complex 3D structure. We plan to irradiate next-generation Flash memories at ISIS, to study the response of these devices to the neutron beam provided by the ChipIR line, which reproduces the terrestrial neutrons spectrum with several orders of magnitude of acceleration, if available, or the VESUVIO line. Samples with both conventional planar and 3D NAND architecture will be exposed to neutrons and results will be compared with those previously obtained at VESUVIO. The analysis will be focused on Floating Gate (FG) errors and multiple bit upsets.

Principal Investigator: Professor Alessandro Paccagnella
Local Contact: Dr Carlo Cazzaniga
Experimenter: Professor Giuseppe Gorini
Experimenter: Professor Carla Andreani
Experimenter: Professor Simone Gerardin
Experimenter: Dr Marta Bagatin
Experimenter: Mr Dennis Crippa
Experimenter: Mr Alex CASTELNOVO

DOI: 10.5286/ISIS.E.RB1700072

ISIS Experiment Number: RB1700072

Publisher: STFC ISIS Neutron and Muon Source

Data format: RAW/Nexus
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Data Citation

The recommended format for citing this dataset in a research publication is as:
[author], [date], [title], [publisher], [doi]

For Example:
Professor Alessandro Paccagnella et al; (2017): Upsets induced by neutrons in next-generation Flash Memories, STFC ISIS Neutron and Muon Source, https://doi.org/10.5286/ISIS.E.RB1700072

Data is released under the CC-BY-4.0 license.