ISIS Neutron and Muon Source Data Journal

Muon soft error effects at 7-nm FinFET technology node

Abstract: Semiconductor industry is currently offering 7 nm technology node with FinFET fabrication processes. Soft error causing mechanisms and error rates for FinFET technologies are expected to be vastly different from those for older planar technologies. This proposal is for the investigation of muon-induced soft errors for 7 nm SRAM and flip-flop (FF) designs. We will be using standard SRAM designs and a custom-designed test IC containing multiple hardened and non-hardened FF and logic circuit designs. Since soft errors caused by muons may be significantly higher than that observed for prior technologies, tests are needed to understand their effects and failure rates to allow for development of predictive models. Results from these experiments will be supported with circuit simulations. Results will support a dissertation and will be disseminated through publications.

Principal Investigator: Professor Bharat Bhuva
Local Contact: Dr Adrian Hillier

DOI: 10.5286/ISIS.E.RB1820001

ISIS Experiment Number: RB1820001

Publisher: STFC ISIS Neutron and Muon Source

Data format: RAW/Nexus
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Data Citation

The recommended format for citing this dataset in a research publication is as:
[author], [date], [title], [publisher], [doi]

For Example:
Professor Bharat Bhuva et al; (2018): Muon soft error effects at 7-nm FinFET technology node, STFC ISIS Neutron and Muon Source, https://doi.org/10.5286/ISIS.E.RB1820001

Data is released under the CC-BY-4.0 license.